An attempt at mostly complete avr support

build.zig

@@ -727,6 +727,16 @@ pub fn MicroBuild(port_select: PortSelect) type {
                     .name = "avr25",
                     .root_source_file = mb.core_dep.namedLazyPath("cpu_avr25"),
                 };
+            } else if (std.mem.eql(u8, target.cpu.model.name, "avr35")) {
+                return .{
+                    .name = "avr35",
+                    .root_source_file = mb.core_dep.namedLazyPath("cpu_avr5"),
+                };
+            } else if (std.mem.eql(u8, target.cpu.model.name, "avrxmega3")) {
+                return .{
+                    .name = "avrxmega3",
+                    .root_source_file = mb.core_dep.namedLazyPath("cpu_avr5"),
+                };
             } else if (std.mem.startsWith(u8, target.cpu.model.name, "cortex_m")) {
                 return .{
                     .name = target.cpu.model.name,

examples/microchip/attiny/build.zig

@@ -13,7 +13,14 @@ pub fn build(b: *std.Build) void {
     const mb = MicroBuild.init(b, mz_dep) orelse return;
 
     const available_examples = [_]Example{
+        .{ .target = mb.ports.attiny.boards.digispark, .name = "digispark_blinky", .file = "src/blinky.zig" },
         .{ .target = mb.ports.attiny.boards.adafruit.trinket, .name = "trinket_blinky", .file = "src/blinky.zig" },
+        .{ .target = mb.ports.attiny.boards.adafruit.gemma, .name = "gemma_blinky", .file = "src/blinky.zig" },
+        .{ .target = mb.ports.attiny.chips.attiny85, .name = "attiny85_blinky", .file = "src/blinky.zig" },
+        .{ .target = mb.ports.attiny.chips.attiny85, .name = "attiny85_blinky_interrupt", .file = "src/blinky_interrupt.zig" },
+        .{ .target = mb.ports.attiny.chips.attiny84, .name = "attiny84_blinky", .file = "src/blinky84.zig" },
+        .{ .target = mb.ports.attiny.chips.attiny1634, .name = "attiny1634_pwm_adc", .file = "src/attiny1634_pwm_adc.zig" },
+        .{ .target = mb.ports.attiny.chips.attiny1616, .name = "attiny1616_tca_rtc", .file = "src/attiny1616_tca_rtc.zig" },
     };
 
     for (available_examples) |example| {

examples/microchip/attiny/src/attiny1616_tca_rtc.zig

@@ -0,0 +1,55 @@
+const microzig = @import("microzig");
+const hal = microzig.hal;
+
+const pwm_cool = hal.gpio.pin(.b, 0);
+const pwm_warm = hal.gpio.pin(.b, 1);
+const aux_led = hal.gpio.pin(.b, 5);
+const switch_pin = hal.gpio.pin(.a, 5);
+const Ramp = hal.progmem.Table(u8, 4, .{ 1, 4, 16, 64 });
+
+pub fn main() void {
+    hal.clock.use_default20_m_hz_div2();
+
+    pwm_cool.set_direction(.output);
+    pwm_warm.set_direction(.output);
+    aux_led.set_direction(.output);
+    hal.pcint.configure(switch_pin, true, .both_edges);
+
+    hal.tca0.configure_pwm(.{
+        .top = 255,
+        .compare0 = 48,
+        .compare1 = 96,
+        .enable_compare0 = true,
+        .enable_compare1 = true,
+        .waveform = .dual_slope_bottom,
+        .clock = .div1,
+    });
+
+    hal.rtc_pit.configure(.cycles512, true);
+    hal.adc.configure(.{
+        .channel = .internal_reference,
+        .reference = .vdd,
+        .sample_count = .samples4,
+        .prescaler = .div16,
+        .initial_delay = .cycles16,
+        .sample_capacitance = true,
+        .freerun = true,
+        .run_standby = true,
+    });
+    hal.adc.enable_result_ready_interrupt();
+    hal.adc.start();
+    hal.watchdog.reset();
+
+    const saved_level = hal.eeprom.read_byte(.from_int(0));
+    const ramp_level = Ramp.get(1);
+    _ = saved_level;
+    _ = ramp_level;
+
+    while (true) {
+        nop();
+    }
+}
+
+inline fn nop() void {
+    asm volatile ("nop");
+}

examples/microchip/attiny/src/attiny1634_pwm_adc.zig

@@ -0,0 +1,40 @@
+const microzig = @import("microzig");
+const hal = microzig.hal;
+
+const ch1_pwm = hal.gpio.pin(.b, 3);
+const ch2_pwm = hal.gpio.pin(.a, 6);
+const fet_pwm = hal.gpio.pin(.c, 0);
+const voltage = hal.gpio.pin(.b, 1);
+const Gamma = hal.progmem.Table(u8, 4, .{ 0, 8, 32, 255 });
+
+pub fn main() void {
+    ch1_pwm.set_direction(.output);
+    ch2_pwm.set_direction(.output);
+    fet_pwm.set_direction(.output);
+    voltage.set_direction(.input);
+
+    hal.timer1.configure_phase_correct_dynamic(.{ .top = 255, .prescaler = .clk_1 });
+    hal.timer1.set_compare_a(96);
+    hal.timer1.set_compare_b(64);
+
+    hal.timer0.configure_phase_correct_pwm_a(.clk_1);
+    hal.timer0.set_compare_a(32);
+
+    hal.adc.configure_internal1v1(.adc6, .div64);
+    hal.adc.start();
+    hal.watchdog.reset();
+    hal.watchdog.configure(.interrupt, .ms16);
+
+    const saved_level = hal.eeprom.read_byte(hal.eeprom.address(0));
+    const gamma_level = Gamma.get(2);
+    _ = saved_level;
+    _ = gamma_level;
+
+    while (true) {
+        nop();
+    }
+}
+
+inline fn nop() void {
+    asm volatile ("nop");
+}

examples/microchip/attiny/src/blinky84.zig

@@ -0,0 +1,31 @@
+const std = @import("std");
+const microzig = @import("microzig");
+const gpio = microzig.hal.gpio;
+
+// ATtiny84: use PA0 as the LED pin
+const led_pin = gpio.pin(.a, 0);
+
+pub fn main() void {
+    led_pin.set_direction(.output);
+
+    while (true) {
+        busy_sleep(20_000);
+        led_pin.toggle();
+    }
+}
+
+pub fn busy_sleep(comptime limit: comptime_int) void {
+    if (limit <= 0) @compileError("limit must be non-negative!");
+
+    comptime var bits = 0;
+    inline while ((1 << bits) <= limit) {
+        bits += 1;
+    }
+
+    const I = std.meta.Int(.unsigned, bits);
+
+    var i: I = 0;
+    while (i < limit) : (i += 1) {
+        std.mem.doNotOptimizeAway(i);
+    }
+}

examples/microchip/attiny/src/blinky_interrupt.zig

@@ -0,0 +1,23 @@
+const std = @import("std");
+const microzig = @import("microzig");
+const gpio = microzig.hal.gpio;
+
+const led_pin = gpio.pin(.b, 1);
+
+pub const microzig_options: microzig.Options = .{
+    .interrupts = .{
+        .INT0 = &my_int0_handler,
+    },
+};
+
+fn my_int0_handler() callconv(.avr_signal) void {
+    led_pin.toggle();
+}
+
+pub fn main() void {
+    led_pin.set_direction(.output);
+
+    while (true) {
+        std.mem.doNotOptimizeAway({});
+    }
+}

port/microchip/attiny/README.md

@@ -3,6 +3,9 @@
 ## Supported Chips
 
 - ATtiny85
+- ATtiny84
+- ATtiny1634
+- ATtiny1616
 
 ## FYI: LLVM issues
 

port/microchip/attiny/build.zig

@@ -5,25 +5,45 @@ const Self = @This();
 
 chips: struct {
     attiny85: *const microzig.Target,
+    attiny84: *const microzig.Target,
+    attiny1634: *const microzig.Target,
+    attiny1616: *const microzig.Target,
 },
 
 boards: struct {
+    digispark: *const microzig.Target,
     adafruit: struct {
         trinket: *const microzig.Target,
+        gemma: *const microzig.Target,
     },
 },
 
 pub fn init(dep: *std.Build.Dependency) ?Self {
     const b = dep.builder;
 
     const atpack = b.lazyDependency("atpack", .{}) orelse return null;
+
     const avr25_target: std.Target.Query = .{
         .cpu_arch = .avr,
         .cpu_model = .{ .explicit = &std.Target.avr.cpu.avr25 },
         .os_tag = .freestanding,
         .abi = .eabi,
     };
 
+    const avr35_target: std.Target.Query = .{
+        .cpu_arch = .avr,
+        .cpu_model = .{ .explicit = &std.Target.avr.cpu.avr35 },
+        .os_tag = .freestanding,
+        .abi = .eabi,
+    };
+
+    const avrxmega3_target: std.Target.Query = .{
+        .cpu_arch = .avr,
+        .cpu_model = .{ .explicit = &std.Target.avr.cpu.avrxmega3 },
+        .os_tag = .freestanding,
+        .abi = .eabi,
+    };
+
     const chip_attiny85: microzig.Target = .{
         .dep = dep,
         .preferred_binary_format = .hex,
@@ -45,11 +65,84 @@ pub fn init(dep: *std.Build.Dependency) ?Self {
         .bundle_compiler_rt = false,
     };
 
+    const chip_attiny84: microzig.Target = .{
+        .dep = dep,
+        .preferred_binary_format = .hex,
+        .zig_target = avr25_target,
+        .chip = .{
+            .name = "ATtiny84",
+            .url = "https://www.microchip.com/en-us/product/attiny84",
+            .register_definition = .{
+                .atdf = atpack.path("atdf/ATtiny84.atdf"),
+            },
+            .memory_regions = &.{
+                .{ .tag = .flash, .offset = 0x000000, .length = 8 * 1024, .access = .rx },
+                .{ .tag = .ram, .offset = 0x800060, .length = 512, .access = .rw },
+            },
+        },
+        .hal = .{
+            .root_source_file = b.path("src/hals/ATtiny84.zig"),
+        },
+        .bundle_compiler_rt = false,
+    };
+
+    const chip_attiny1634: microzig.Target = .{
+        .dep = dep,
+        .preferred_binary_format = .hex,
+        .zig_target = avr35_target,
+        .chip = .{
+            .name = "ATtiny1634",
+            .url = "https://www.microchip.com/en-us/product/attiny1634",
+            .register_definition = .{
+                .atdf = atpack.path("atdf/ATtiny1634.atdf"),
+            },
+            .memory_regions = &.{
+                .{ .tag = .flash, .offset = 0x000000, .length = 16 * 1024, .access = .rx },
+                .{ .tag = .ram, .offset = 0x800100, .length = 1024, .access = .rw },
+            },
+        },
+        .hal = .{
+            .root_source_file = b.path("src/hals/ATtiny1634.zig"),
+        },
+        .bundle_compiler_rt = false,
+    };
+
+    const chip_attiny1616: microzig.Target = .{
+        .dep = dep,
+        .preferred_binary_format = .hex,
+        .zig_target = avrxmega3_target,
+        .chip = .{
+            .name = "ATtiny1616",
+            .url = "https://www.microchip.com/en-us/product/attiny1616",
+            .register_definition = .{
+                .atdf = atpack.path("atdf/ATtiny1616.atdf"),
+            },
+            .memory_regions = &.{
+                .{ .tag = .flash, .offset = 0x000000, .length = 16 * 1024, .access = .rx },
+                .{ .tag = .ram, .offset = 0x803800, .length = 2048, .access = .rw },
+            },
+        },
+        .hal = .{
+            .root_source_file = b.path("src/hals/ATtiny1616.zig"),
+        },
+        .bundle_compiler_rt = false,
+    };
+
     return .{
         .chips = .{
             .attiny85 = chip_attiny85.derive(.{}),
+            .attiny84 = chip_attiny84.derive(.{}),
+            .attiny1634 = chip_attiny1634.derive(.{}),
+            .attiny1616 = chip_attiny1616.derive(.{}),
         },
         .boards = .{
+            .digispark = chip_attiny85.derive(.{
+                .board = .{
+                    .name = "Digispark",
+                    .url = "http://digistump.com/products/1",
+                    .root_source_file = b.path("src/boards/digispark.zig"),
+                },
+            }),
             .adafruit = .{
                 .trinket = chip_attiny85.derive(.{
                     .board = .{
@@ -58,6 +151,13 @@ pub fn init(dep: *std.Build.Dependency) ?Self {
                         .root_source_file = b.path("src/boards/adafruit_trinket.zig"),
                     },
                 }),
+                .gemma = chip_attiny85.derive(.{
+                    .board = .{
+                        .name = "Adafruit Gemma",
+                        .url = "https://www.adafruit.com/product/1222",
+                        .root_source_file = b.path("src/boards/adafruit_gemma.zig"),
+                    },
+                }),
             },
         },
     };

port/microchip/attiny/src/boards/adafruit_gemma.zig

@@ -0,0 +1,13 @@
+pub const chip = @import("chip");
+
+pub const clock_frequencies = .{
+    .cpu = 8_000_000,
+};
+
+pub const pin_map = .{
+    .D0 = "PB0",
+    .D1 = "PB1",
+    .D2 = "PB2",
+    // Built-in LED on D1 (PB1)
+    .LED = "PB1",
+};

port/microchip/attiny/src/boards/digispark.zig

@@ -0,0 +1,17 @@
+pub const chip = @import("chip");
+
+pub const clock_frequencies = .{
+    .cpu = 16_500_000,
+};
+
+pub const pin_map = .{
+    // Digispark pin numbering maps to PORTB
+    .P0 = "PB0",
+    .P1 = "PB1",
+    .P2 = "PB2",
+    .P3 = "PB3",
+    .P4 = "PB4",
+    .P5 = "PB5",
+    // Built-in LED on P1 (PB1)
+    .LED = "PB1",
+};

port/microchip/attiny/src/hals/ATtiny1616.zig

@@ -0,0 +1,16 @@
+pub const registers = @import("attiny1616/registers.zig");
+pub const gpio = @import("attiny1616/gpio.zig");
+pub const clock = @import("attiny1616/clock.zig");
+pub const tca0 = @import("attiny1616/tca0.zig");
+pub const rtc_pit = @import("attiny1616/rtc_pit.zig");
+pub const adc = @import("attiny1616/adc.zig");
+pub const pcint = @import("attiny1616/pcint.zig");
+pub const watchdog = @import("attiny1616/watchdog.zig");
+pub const eeprom = @import("attiny1616/eeprom.zig");
+pub const progmem = @import("attiny85/progmem.zig");
+
+pub const memory = struct {
+    pub const flash_size = 16 * 1024;
+    pub const eeprom_size = 256;
+    pub const sram_size = 2048;
+};